1. Field of the Invention
This invention relates to interconnection structures for silicon semiconductor devices and more particularly to methods and apparatus for forming conductive plugs serving as contacts or via connections.
2. Description of Related Art
U.S. Pat. No. 5,674,787 of Zhao et al. for "Selective Electroless Copper Deposited Interconnect Plugs for ULSI Applications" shows selective CU electroless deposition in a via hole using a seed layer. An electroless copper (Cu) deposition method selectively forms encapsulated copper plugs to connect conductive regions of a semiconductor device. A contact displacement technique forms a thin activation copper layer on a barrier metal layer, e.g. TiN, which covers the underlying metal layer. Copper is deposited in the via by an electroless auto-catalytic process. Electroless copper deposition continues until the via is almost filled which leaves sufficient room at the top for an upper encapsulation to be formed there, but first the device is rinsed in DI water to remove the electroless deposition solution. Then after the rising away of the electroless copper solution, a cap barrier layer, from 500 .ANG. to about 1500 .ANG. thick, is formed of a variety of metals or metal alloys such as Ni, Co, Ni--Co alloy, CoP, NiCoP, or NiP from another electroless solution. Sidewalls of SiN or SiON, the bottom barrier layer and the cap barrier layer complete the full encapsulation of the copper plug via.
U.S. Pat. No. 5,470,789 of Misawa for "Process for Fabricating Integrated Circuit Devices" produces a TiN/Cu (titanium nitride/copper) interconnect having a capping layer formed of TiN unlike the Pt, Pd, or Ag cap layer of this invention.
U.S. Pat. No. 4,282,271 of Feldstein for "Dispersions for Activating Non-Conductors for Electroless Plating" shows an electroless deposition technique.